500Wp+ era. Bigger modules yes, but better…?
The switch to large wafer sizes has brought in several challenges in materials, technology and manufacturing of the crystalline silicon value chain in terms of wafers, cell and modules. Yield and throughput management as well as process control on large manufacturing lines may lead to reliability issues in future. Fast moving technological changes have made the transition from M1 to G12, even more difficult to adopt and sustain. The paper will discuss some of these challenges and the associated risks involved in this regard. A few strategic risk control measures, in manufacturing as well as for systems integration are also deliberated.